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Intersil 




THE IH5009 SERIES 
OF LOW COST 
ANALOG SWITCHES 



INTRODUCTION 

The IH5009 series of analog switches described in this note 
were designed by Intersil to fill the need for an easy-to-use, 
inexpensive switch for both industrial and military applica- 
tions. Although low cost was one of the primary design 
objectives (less than $1/switch in volume), performance 
and versatility have not been sacrificed. Up to four channels 
per package are available, no external power supplies are 
required, and switching speeds are guaranteed to be less 
than 500 ns. 

CIRCUIT OPERATION 

Switching Virtual Ground Signals 

The signals seen at the drain of a junction FET type analog 
switch can be arbitrarily divided into two categories: Those 
which are less than ±200 mV, and those which are greater 
than ±200 mV. The former category includes all those cir- 
cuits where switching is performed at the virtual ground 
point of an op-amp, and it is primarily towards these appli- 
cations that the IH5009 family of circuits is directed. In 
applications where the signal amplitude at the switch is 
greater than ±200 mV, the simple design of the I H 5009 
is no longer appropriate and a more complex switch design 
is called for. See REF. 1 for a complete discussion of this 
type of switch. 

It is important to realize that the ±200 mV limitation 
applies only to the signal at the drain of the FET switch; 
signals of ±10V or greater can be commutated by the 
IH5009 in a circuit of the type shown in Figure 1. For a 




FIGURE 1. SWITCHING AT VIRTUAL GROUND POINT 



high gain inverting amplifier the signal level at the virtual 
ground point will only be a few microvolts for ±10V input 
and output swings. 

The Compensating FET 

Those devices which feature common drains (IH5009, 5010, 
5013, 5014, etc.) have another FET in addition to the 
channel switches (Figure 2). This FET, which has gate and 



source connected such that V GS = 0, is intended to compen- 
sate for the on-resistance of the switch. When placed in 
series with the feedback resistor (Figure 3) the gain is 
given by 



GAIN = 



10 k!2 + Ft DS (compensator) 
10 k!2 + R DS (switch) 



Clearly, the gain error caused by the switch is dependent 
on the match between the FETs rather than the absolute 
value of the FET on-resistance. For the standard product, 



COMPENSATING FET 




FIGURE 2. SCHEMATIC OF IH5009 & IH5010 



COMPENSATION 



SERIES 
ELEMENT 



;o — w. 




FIGURE 3. USE OF COMPENSATION FET 



all the FETs in a given package are guaranteed to match 
within 5012. Selections down to 512 are available however. 
The part numbers are shown in Table I. Since the absolute 
value of R D s(on) is on, y guaranteed to be less than 10012 or 
15012, it is clear that a substantial improvement in gain 
accuracy can be obtained by using the compensating FET. 
This is only true however when the input resistor and the 
feedback resistor are similar in value: for dissimilar values, 
the benefits of the compensating FET are less pronounced. 



INTERSIL INC., 10900 N. TANTAU AVE., CUPERTINO, CA. 95014 

Printed in U.S.A. 



(408) 257 5450 TWX 910-338 0028 
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TABLE I 



PART 

Ml IMRFR 
1 V UIVIDCn 


INPUT 


DESCRIPTION 


EFFECTIVE 

r DSION) 
(OHM^t 

MAX. 


r DS(ON) 
(OHMS) 
MAX. 


IH5009 


High Level 


4-Channel, 15V Logic 


50 


100 


IH5010 


f-\ ~r I -f"-i- ■ r~\ *T~ 1 

DTL, TTL, RTL 


4-Channel, 5V Logic 


50 


1 50 


ITS7318 


High Level 


4-Channel, 15V Logic 


25 


100 


ITS7319 


DTL, TTL, RTL 


4-Channel, 5V Logic 


25 


1 50 


ITS7320 


High Level 


4-Channel, 15V Logic 


10 


100 


ITS7321 


DTL, TTL, RTL 


4-Channel, 5V Logic 


10 


150 


ITS7322 


High Level 


4-Channel, 15V Logic 


5 


100 


ITS7323 


DTL, TTL, RTL 


4-Channel, 5V Logic 


5 


150 


IH501 3 


High Level 


o-L*nannei, i ov Logic 


Kn 


i nn 
1 uu 


I H 50 14 


rt"Tl TTI DTI 

U 1 L, 1 1 L, n 1 L 


j-unannei, o v Logic 


OU 


i Kn 




High Level 


o-L-nanne!, \ ov Logic 


ZD 


1 nn 
I uu 




nn tti dti 

U 1 L, 1 1 L, n 1 L 


3-Channel, 5V Logic 


9K 
ZD 


1 KTl 
I DU 


ITS7326 


High Level 


3-Channel, 15V Logic 


10 


100 


ITS7327 


DTL, TTL, RTL 


3-Channel, 5V Logic 


10 


150 


ITS7328 


High Level 


3-Channel, 15V Logic 


5 


100 


ITS7329 


DTL, TTL, RTL 


3-Channel, 5V Logic 


5 


150 


IH501 7 


H igh Level 


2-Channel, 15V Logic 


50 


100 


IH5018 


DTL, TTL, RTL 


2-Channel, 5V Logic 


50 


150 


ITS7330 


High Level 


2-Channel, 15V Logic 


25 


100 


ITS7331 


DTL, TTL, RTL 


2-Channel, 5V Logic 


25 


150 


ITS7332 


High Level 


2-Channel, 15V Logic 


10 


100 


ITS7333 


DTL, TTL, RTL 


2-Channei, 5V Logic 


10 


150 


ITS7334 


High Level 


2-Channel, 15V Logic 


5 


100 


ITS7335 


DTL, TTL, RTL 


2-Channel, 5V Logic 


5 


150 


IH5021 


High Level 


1-Channel, 15V Logic 


50 


100 


I H 5022 


DTL, TTL, RTL 


1-Channel, 5V Logic 


50 


150 


ITS7336 


High Level 


1 -Channel, 15V Logic 


25 


100 


ITS7337 


DTL, TTL, RTL 


1-Channel, 5V Logic 


25 


150 


ITS7338 


High Level 


1-Channel, 15V Logic 


10 


100 


ITS7339 


DTL, TTL, RTL 


1-Channel, 5V Logic 


10 


150 


ITS7340 


High Level 


1-Channel, 15V Logic 


5 


100 


ITS7341 


DTL, TTL, RTL 


1-Channel, 5V Logic 


5 


150 



Logic Compatibility 



The 5009 through 5024 series parts are primarily intended 
for constant — impedance multiplexing. The diode con- 
nected to the J-FET source acts like a shunt switch, while 
the FET itself acts as a series switch. The advantage of this 
configuration is its high noise immunity when the series 
element is off. The diode then clamps the source to +0.7V 
with a low AC impedance to ground and prevents false 
triggering of the FET for positive inputs. Negative inputs 
present no problems since they further increase the OFF 
voltage beyond pinch-off. 



The even-numbered devices in the family (5010 through 
5024) are designed for interfacing with 5V logic. The pinch- 
off of the FETs is selected to be less than 3.9V (Vp @ l D = 
1 nA); therefore, a positive logic level +4.5V will supply 
adequate safety margin for proper gating action. To guar- 
antee this +4.5V from series 54/74 TTL logic requires the 
use of a pull-up resistor: Values from 2 k£2 to 10 kfi are 
suitable depending upon the speed requirements (Figure 4). 
Alternatively the TTL may be operated from +6V supplies. 
The "1" level will then be greater than +4.5V without the 



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need for a pull-up resistor. The maximum on-resistance is 
guaranteed for +0.5V on the gate of the FET. Since the 
maximum low level output voltage from TTL is 0.4V, the 
ON-resistances specified are conservative. With 0V applied 
to the FET gate, typical ON-resistances of 90X2 will be 
obtained. 



The odd-numbered devices in the family (5009 through 



5023) are designed for interfacing with 15V logic. The 
pinch-off of these parts is selected to be less than 10V, so 
that a +11V positive logic level provides adequate safety 
margin. To obtain this level from open collector TTL logic 
also requires a pull-up resistor; 1 k£2 to 10 k£2 is suitable 
depending on the speed and fan-out requirements (Fig- 
ure 5). The ON-resistance is measured with +1.5V applied 
to the gate and is guaranteed to be less than 10012 at 25°C. 
For 0V on the gate, the typical R ON is 6012. 





FIGURE 5. INTERFACING WITH + 1 5V OPEN COLLECTOR LOGIC 



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In applications where low ON-resistance is critical, special 
selections can be made. Since high pinch-off FETs have 
lower ON-resistances than low pinch-off types (for a given 
geometry) it is advantageous to make such selections from 
the odd-numbered devices and use high level TTL for the 
control logic. 

Maximum Switch Current 

The maximum current through the switch is dictated 
primarily by leakage considerations rather than power 
dissipation problems. When the drain of the FET is held at 
virtual ground, current through the channel tends to bias 
the source positive. Eventually, the source-gate junction 
will forward bias, giving rise to large leakage currents. This 
is most likely to occur at high temperature when the junc- 
tion turn-on potential is at its lowest. The data sheet guar- 
antees maximum leakage for l s = 1 mA and 2 mA, with 
V| N = OV. The substantial increase seen in the leakage in 
changing l s from 1 mA to 2 mA (at 70°C) indicates that 
the turn-on potential is being approached rapidly under 
these conditions. Specifying the leakage for V !N (the gate 
potential) = OV is a worst case condition; under most cir- 
cumstances V| N = +200 mV would be a more typical value. 
Thus 200 mV additional signal would be required at the 
source to give the same leakage current. 



Switching Speed and Crosstalk 

The switching speed is guaranteed to be less than 500 ns at 
25°C. Typical turn-on and turn-off times are 150 ns and 
300 ns, respectively. 

When analog switches are used in conjunction with opera- 
tional amplifiers, settling time is often an important param- 
eter. In a typical fast amplifier, settling times of 1 /lis to 
0.1% are seen. This time is primarily caused by non-linear 
modes of operation within the amplifier, and the inclusion 
of an analog switch at the virtual ground point will not 
cause significant degradation of the settling time. 

Crosstalk can be measured using the circuit of Figure 6. At 
low frequencies, it is very difficult to obtain accurate values 
since the separation is better than 120 dB. Typical crosstalk 
as a function of frequency is shown in Figure 7. 

PRODUCT SUMMARY 

Table 2 shows the different product numbers, their sche- 
matics, and their equivalent circuits. The even numbers are 
designed to be driven from 5V TTL, while odd numbers are 
designed to be driven from TTL open collector logic (15V). 

REF [1] : Intersil Application Note A003: "Understand- 
ing and Applying the Analog Switch ". 



\ 



10KS2 ~ 0V 




+5V (5010 ETC) 
+ 15V (5009 ETC) 



FIGURE 6. CROSSTALK M E ASU R E ME NT CI RCU IT 




10 100 IK 10K 100K 1M 
FREQUENCY (Hz) 



FIGURE 7. CROSSTALK AS A FUNCTION OF FREQUENCY 



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TABLE II 



IH5009 (rDS(ON) i 100n) 
IH5010 (roS(ON) < 150fi) 
14 PIN SILICONE DIP 



^3 ^Xi^~ 
^5 ^7 

Vf 

O10 O 8 

IT 

612 014 



YJ 



IH5011 (r D S(ON) < 10 °") 
IH5012 (r DS (ON) < 150tt) 
16 PIN SILICONE DIP 



6 8 

TT 

14 ° 12 6l ° 16 

TT 

013 015 



IH5013 (ros(ON) < 10012) 
IH5014 <r DS( oN) < 
14 PIN SILICONE DIP 



TY 

3 1 

TY 
TY 



YJ 



IH5015 (r D S(ON) < 100ft) 
IH5016 (r DS (ON) < 150n ' 
16 PIN SILICONE DIP 



^ 4 l ^ _ 8 

FT 

A12 010 



IH5017 (r DS(0 N) < 100ft) 
IH5018 (r DS (ON) < 150ft) 
8 PIN SILICONE DIP 



FYJY 



IH5019 (r DS (ON) < 100ft) 
IH5020 (r D s(ON) < 150ft> 
8 PIN SILICONE DIP 



^4 g 
^5 ^7 



IH5021 (r DS(0 N) < 100") 
IH5022 (r DS (ON) < 150ft) 
8 PIN SILICONE DIP 



IH5023 (r DS(ON) < 100ft) 
IH5024 (r DS(0 N) < 150ft) 
8 PIN SILICONE DIP 



TYTY 



Tif 



5 of 8 




CHARACTERISTICS: SLEW RATE - 10V/(iS 
GAIN ACCURACY - 
.5% IIH5009) TO .05% 
IITS7322). See Table I. 



LOW COST 4 CHANNEL MULTIPLEXER 



.01 (iF 




CHANNEL 
SAMPLE/HOLD SELECT 
SELECT 



CHARACTERISTICS: TYPICAL OUTPUT 
VOLTAGE DRIFT 
<5 mV/sec 



3 CHANNEL MULTIPLEXER WITH SAMPLE & HOLD 



1 MSi 



IH5009/IH5010 



110 KI2 



20.4 K« 



lo.i Kn 
I— VsA-h 



"1 



T 



^10 



01 

CH4 



I 



V. 11 




07 

CH3 



08 

CH2 



614 

CHI 



CHARACTERISTICS: GAIN = 1 FOR CHANNEL 1 ON. CHANNELS 2. 3. 4 OFF 
GAIN - 2 FOR CHANNEL 2 ON; CHANNELS 1. 3. 4 OFF 
GAIN = 10 FOR CHANNEL 3 ON; CHANNELS 1, 2, 4 OFF 
GAIN - 50 FOR CHANNEL 4 ON; CHANNELS 1, 2. 3 OFF 
GAIN = 100 FOR ALL CHANNELS OFF 
SLEW RATE - 10V/(.S 



GAIN RANGING CIRCUIT 




GAIN PROGRAMMABLE AMPLIFIER 




PROGRAMMABLE I NT EG R ATO R WITH RESET 



Eini O \<Vv 



IY] 

o — VW — o ^ j p — 1 1 



o — WW-o ^ | p — 



E|N6 




ins o — Wv — — -j ^ |- — 

o— — i r — 1 



Pt^ j 




E1M4O— wv- 



E| N15 o — Wv — o- 



IV- 
IY™ 
PT 



PT 



NOTE: THE ANALOG SWITCH BETWEEN THE OP-AMP AND THE 

16 INPUT SWITCHES REDUCES THE ERRORS DUE TO LEAKAGE. 



CHARACTERISTICS: ERROR = 0.4 fjV TYPICAL @ 25°C 
10 (iV TYPICAL @70°C 



16 CHANNEL MULTIPLEXER 



Intersil cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an Intersil product. No other circuit patent licenses are implied. 
Intersil reserves the right to change without notice at any time the circuitry and specifications. 

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